1. Field of the Invention
This invention relates to an improved digital signal processor.
2. Description of Related Art
A digital signal processor (DSP) performs computations which generally require large numbers of arithmetic operations to be performed rapidly. Because it is desirable for arithmetic operations to be performed as rapidly as possible, it is desirable to find ways for the DSP use fewer processor cycles to perform a given set of arithmetic operations, or to perform more arithmetic operations in a given number of processor cycles.
One operation which is often performed by a digital signal processor is to multiply two numbers together and add the product to an accumulating sum. This operation is particularly important for audio and video applications, such as for example in computing vector dot products. In audio and video applications, it is desirable to perform many such operations at high speed and with substantial accuracy.
Accordingly, it would be advantageous to provide a digital signal processor which can perform certain arithmetic operations at high speed and with substantial accuracy.
The invention provides an improved digital signal processor, in which arithmetic multiply-add instructions are performed faster with substantial accuracy. In a preferred embodiment, the digital signal processor performs multiply-add instructions with look-ahead rounding, so that rounding after repeated arithmetic operations proceeds much more rapidly.
In a preferred embodiment, the digital signal processor is also augmented with additional instruction formats which are particularly useful for digital signal processing. A first additional instruction format allows the digital signal processor to incorporate a small constant immediately into an instruction, such as to add a small constant value to a register value, or to multiply a register by a small constant value; this allows the digital signal processor to conduct the arithmetic operation with only one memory lookup instead of two. A second additional instruction format allows the digital signal processor to loop back to a location relatively addressed from the looping instructions; this allows the digital signal processor to conduct the loop operation with only one memory lookup instead of two.